APPENDIX A
|
Specifications
of Selected Aircraft SAR Systems |
|||||
|
|
AirSAR |
C/X
SAR |
E-SAR |
KSAR |
STAR-1 |
General |
|
|
|
|
|
|
Country |
USA |
Canada |
Germany |
Denmark |
Canada |
|
Agency |
JPL/NASA |
CCRS |
DLR |
TUD |
Intera |
|
Aircraft |
DC-8 |
CV-580 |
DO-228 |
Gulfstream |
Cessna |
|
Nominal altitude (km) |
8 |
6 |
3.5 |
12.5 |
10 |
|
Nominal airspeed (m/sec) |
- |
130 |
70 |
300 |
145 |
|
Purpose (Experimental or Operational) |
E |
E |
E |
E |
O |
Radar |
|
|
|
|
|
|
Band |
C, L,
P |
X, C |
X, C,
L |
C |
X |
|
Wavelengths (cm) |
5.6,
23.5, 68 |
3.2,
5.6 |
3.1,
5.6, 23 |
5.6 |
3.1 |
|
Frequency (GHz) |
5.3,
1.25, 0.44 |
9.3,
5.3 |
9.6,
5.3, 1.3 |
5.3 |
9.6 |
|
Antenna length (m) |
1.3,
1.6, 1.8 |
-1.2 |
0.15,
0.24, 0.85 |
1.2 |
1.2 |
|
Antenna motion controller |
N |
Y |
N |
Y |
Y |
|
Polarization diversity |
Full |
Full |
HH, VV |
VV |
HH |
|
Quadrature polarization |
C, L,
P |
C |
N |
N |
N |
|
Incident angle (degrees) |
20 -
60 |
0 - 85 |
15 -
60 |
20 -
80 |
45 -
80 |
|
Slant range resolution (m) |
7.5
(S) |
6-20 |
2 (S) |
2, 4,
8 |
6, 12 |
|
Range cells |
- |
4096 |
2048 |
8192 |
4096 |
|
Azimuth resolution (m) |
2 |
<1-10 |
2 |
2, 4,
8 |
6 |
|
Looks |
4 |
1 - 7 |
1 - 8 |
2 - 16 |
7 |
|
Swath width (km) (Slant) |
7 - 13 |
18 -
63 |
3 (S) |
9 - 48
(S) |
40, 60
(S) |
|
Noise equivalent s° (dB) |
- |
-30,
-40 |
-40,
-30, -35 |
-42 |
-30 |
APPENDIX B
MOROCCO
(Octal SHARC VME64
Master Board)
The Morocco board is based on Analog
Devices SHARC™ (ADSP2106x) DSPs.
Digital Signal Processors
Each
SHARC DSP is capable of 120 MFLOPS peak performance and includes a large bank
of on-chip SRAM (up to 4 Mbits). The memory is dual ported to support internal
DMA engines which concurrently drive the six 40 MBytes/s link ports and 240
MBytes /s parallel bus.
Architecture
The
board is architected with a base configuration of four clusters of two SHARCs
each having access to their own cluster SRAM. Each cluster and the PCI bus has
access to a block of common SRAM. On-chip multi-processing arbitration allows
each cluster of ADSP2106xs to share access to cluster SRAM and to arbitrate for
common SRAM or the PCI bus. Large blocks of data can stream into the common or
cluster SRAM from VME64 or the PMC module site. Cluster Expansion Modules (CEM)
can enhance the capabilities of each cluster with additional DSPs, SRAM, DRAM,
or I/O.
Memory
Each
cluster of SHARCs has access to 128k/256k/512k x 32 or zero wait-state cluster
SRAM and, each cluster can have its memory expanded to DRAM, EDRAM or 48-bit
SRAM using the memory options available with CEM.
The
common SRAM is 128k/256k/512k x 32 and is shared with the PCI bus or any one of
the SHARC Clusters.
VME64 Master
VME64
functionality is implemented using the Tundra Universe chipTM. The
Universe chip interfaces VME64 to PCI64 implementing master capabilities on
both busses. The internal architecture of the Universe allows VME64 data
transfer rates close to the theoretical maximum of 80 MBytes/s.
PCI and PMC site
The
Morocco hosts a 32-bit PCI bus with the ability to transfer 132 MBytes/s data
between SHARCs, PMC modules, common and cluster SRAM, and the VME64 bus. The
PMC site is used to host a wide variety of off-the-shelf or custom I/O. Some
examples of PMC modules on the market include high-speed fiber optic and
coaxial interconnects, analog I/O, serial and parallel buses and much more.
Further information for the list of recommended PMC I/O vendors can be
collected from spectrum through www.spectrumsignal.com.
Link Ports
Each
SHARC has six 40 Mbytes/s link ports. Eight link ports, one from each SHARC,
are routed to the front panel. The remaining link ports are interconnected
on-board. Link port 4 is daisy-chained from cluster 0 to all other clusters to
provide an alternative to shared memory VMEbus booting.
Serial Ports
Each
SHARC has two serial ports. One serial port from SHARC is connected to form a
TDM serial bus, which is routed to front panel and to each CEM. The other
serial port from SHARC is routed up to the CEM to control I/O or other SHARCs.
Software
A
complete range of software support is available for the Morocco. Development
tools ar PC hosted with a debugger, C Compiler, optimized signal processing
libraries and DSP operating system support. Support is also provided for host
communications to the SHARCs via an interface library. Device drivers are
available for operating systems such as VxWorks and Solaris.
Features
· Eight 40 MHz on-board SHARC ADSP2106x DSP processors
· 960 MFLOPS (Peak) in a single 6U VME slot
· On-board PCI Local Bus with VME64 to PCI bridge
· One IEEE P1386 standard PCI PMC Site for custom or off-the-shelf I/O
· Four banks of 128k/512k x 32 Cluster 0ws SRAM, each shared between 2 SHARCS
· 128k/512k x 32 Global 0ws SRAM shared with all eight SHARCS
· Cluster Expansion Modules to add memory, I/O, and/or more DSPs
· Comprehensive Software Support
Specifications
·
Motherboard
Format
6U x 160mm VME board
· VME Interface
Tundra Universe VME64
· SHARC Processor
8 ADSP-21060 or ADSP-21062 SHARC processors
120 MFLOP, 40MIPs floating point DSP
240 MBytes/s external memory bandwidth
240 MBytes/s link port bandwidth
10 independent DMA controllers
· SHARC Internal Memory
ADSP-21060: 4MB 0ws dual-ported SRAM
ADSP-21062: 2 MB 0ws dual-ported SRAM
· SHARC External Memory
Cluster SRAM – max 4 x 512K x 32 SRAM
Common SRAM – max 512K x 32 SRAM
CEM DRAM – max 256 MB DRAM
· Expansion Sites
4 CEM sites
1 PMC site
· Connectors
Two 96-pin P1 and P2 VME DIN connectors
8 front-panel SHARC link-port connectors
Front-panel JTAG connector for system debug
Status LED’s
Serial port
· Software
Solaris, Windows NT, and VxWorks drivers
Compatible with ADI software development tools
· Power Requirements
Requires +5V supply only
· Operating Environment
0°C to 70°C
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·
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·
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·
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·
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·
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