I am currently an engineering researcher with the Communications and Signal Processing Research Group of the Electrical & Electronic Engineering Department of Imperial College London. I am working with Prof. Maria Petrou.
During the years 2005-2008 I did a PhD at Imperial College London, entitled "Hardware Architectures for Real-Time Video Enhancement and their Application to an Adaptive Image Sensor". My PhD work was done under the supervision of Prof. Peter Cheung, Dr. Christos Bouganis, and Dr. Kostas Masselos, and in collaboration with Dr. George A. Constantinides and Dr. Yiannis Andreopoulos.
Upon completion of my PhD, I became a postdoctoral research associate with the Circuits & Systems Research Group of the Electrical & Electronic Engineering Department of Imperial College London, and worked on FPGA-based vision methods for real-time UAV navigation.
In October 2009, I joined the Products Development Department of Intracom Defense Electronics, Athens, Greece, as an R&D engineer on hardware-based wireless multimedia communications.
Since April 2011, I am with the Communications and Signal Processing Research Group of the Department of Electrical and Electronic Engineering of Imperial College London, working on robotic vision and 3D surface reconstruction.
I hold an Electrical & Computer Engineering diploma from the Electrical & Computer Engineering Department of the University of Patras, Greece. My undergraduate advisor was Dr. Stefanos Kaxiras.
A selection of my publications can be found at the DBLP server. For a complete list of my publications to date, please see below.
J1. Maria E. Angelopoulou, Christos-Savvas Bouganis, and Peter Y.K. Cheung, "Blur Identification with Assumption Validation for Sensor-Based Video Reconstruction and its Implementation on Field Programmable Gate Array", IET Computers & Digital Techniques, vol. 5, no. 4, pp. 271-286, July 2011. [pdf]
J2. Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y.K. Cheung, and George A. Constantinides, "Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement", ACM Transactions on Reconfigurable Technology and Systems, vol. 2, no. 4, pp. 22:1-22:29, September 2009. [pdf]
J3. Maria E. Angelopoulou, Konstantinos Masselos, Peter Y.K. Cheung, and Yiannis Andreopoulos, "Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet Transform Computation Schedules on FPGAs", Journal of Signal Processing Systems for Signal, Image, and Video Technology, vol. 51, no. 1, pp. 3-21, April 2008. [pdf]
C1. Maria E. Angelopoulou and Christos-Savvas Bouganis, "Feature Selection with Geometric Constraints for Vision-Based Unmanned Aerial Vehicle Navigation", in Proc. IEEE International Conference on Image Processing (ICIP), pp. 2405-2408, September 2011. [pdf]
C2. Maria E. Angelopoulou, Christos-Savvas Bouganis, and Peter Y.K. Cheung, "A Sensor-Based Approach to Linear Blur Identification for Real-Time Video Enhancement", in Proc. IEEE International Conference on Image Processing (ICIP), pp. 141-144, November 2009. [pdf]
C3. Maria E. Angelopoulou, Christos-Savvas Bouganis, and Peter Y.K. Cheung, "Video Enhancement on an Adaptive Image Sensor", in Proc. IEEE International Conference on Image Processing (ICIP), pp. 681-684, October 2008. [pdf]
C4. Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y.K. Cheung, and George A. Constantinides, "FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor", in Proc. Applied Reconfigurable Computing (ARC), pp. 125-136, March 2008. [pdf]
C5. Maria Angelopoulou, Konstantinos Masselos, Peter Cheung, and Yiannis Andreopoulos, "A Comparison Of 2-D Discrete Wavelet Transform Computation Schedules on FPGAs", in Proc. IEEE International Conference on Field Programmable Technology (FPT), pp. 181-188, December 2006. [pdf]
Maria E. Angelopoulou, "Hardware Architectures for Real-Time Video Enhancement and their Application to an Adaptive Image Sensor", Imperial College London, May 2009. [pdf]
1. Computer Vision & Image Processing: 3D surface reconstruction, photometric stereo,
vision-based UAV navigation, super-resolution video reconstruction,
motion blur identification and deblurring
2. Reconfigurable hardware: FPGA architectures for real-time
video processing, power/energy optimization, efficient memory utilization, data
re-use, throughput optimization
--This webpage was last updated on September 20, 2011.